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    内容提示： Control Synthesis for aSmart Card Personalization Systemusing Symbolic Model Checking?Biniam Gebremichael and Frits VaandragerNijmegen Institute for Computing and Information SciencesUniversity of NijmegenP.O. Box 9010, 6500 GL Nijmegen, The Netherlands[biniam,fvaan]@cs.kun.nlAbstract. Using the Cadence SMV symbolic model checker we syn-thesize, under certain error assumptions, a scheduler for the smart cardpersonalization system, a case study that has been proposed by Cyber-netix Recherche in the context...

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    Control Synthesis for aSmart Card Personalization Systemusing Symbolic Model Checking?Biniam Gebremichael and Frits VaandragerNijmegen Institute for Computing and Information SciencesUniversity of NijmegenP.O. Box 9010, 6500 GL Nijmegen, The Netherlands[biniam,fvaan]@cs.kun.nlAbstract. Using the Cadence SMV symbolic model checker we syn-thesize, under certain error assumptions, a scheduler for the smart cardpersonalization system, a case study that has been proposed by Cyber-netix Recherche in the context of the EU IST project AMETIST. Thescheduler that we synthesize, and of which we prove optimality, has beenpreviously patented. Due to the large number of states (which is beyond1013), this synthesis problem appears to be out of the scope of existingtools for controller synthesis, which typically use some form of explicitstate enumeration. Our result provides new evidence that model checkerscan be useful to tackle industrial sized problems in the area of schedulingand control synthesis.1IntroductionBackgroundModel checking involves analyzing a given model of a system and verifying thatthis model satisfies some desired properties. System models are typically de-scribed as finite transition systems, while properties are described in terms oftemporal logic. Once the definition of the system, S, and its property, ψ, arefixed, the model checking problem is easily described as S |= ψ? (does S satisfyψ?). Thanks to the symbolic representation of transition systems, state-of-the-art model checking tools are now capable of solving such problems for modelswith more than 1020states [4].Control synthesis, on the contrary, does not assume the existence of a modelof the full system. Instead, it considers the uncontrolled plant and tries to syn-thesize a controller by finding a possible instance of a model that satisfies adesired property. Control synthesis for Discrete Event Systems (DES) has beenextensively studied over the past two to three decades, and a well-establishedtheory has been developed by Ramadge and Wonham [16]. The Ramadge and?This work was supported by the European Community Project IST-2001-35304AMETIST, http://ametist.cs.utwente.nl.

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