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    188宝金博页面版: Superlattice barrier varactors

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    内容提示： Page 146Third International Symposium on Space Terahertz TechnologySuperlattice Barrier Varactors*C. Raman, J. P. Sun, W. L. Chen, G. Munns,J. East and G. HaddadSolid State Electronics LaboratoryUniversity of Michigan, Ann Arbor, MichiganAbstract SBV (Single Barrier Varactor) diodes have been proposed as alternatives to Schottkybarrier diodes for harmonic multiplier applications. However these show a higher currentthan expected. The excess current is due to X valley transport in the barrier. We willpresent...

    文档格式：PDF | 页数：12 | 浏览次数：24 | 上传日期：2016-03-25 04:01:26 | 文档星级：
    Page 146Third International Symposium on Space Terahertz TechnologySuperlattice Barrier Varactors*C. Raman, J. P. Sun, W. L. Chen, G. Munns,J. East and G. HaddadSolid State Electronics LaboratoryUniversity of Michigan, Ann Arbor, MichiganAbstract SBV (Single Barrier Varactor) diodes have been proposed as alternatives to Schottkybarrier diodes for harmonic multiplier applications. However these show a higher currentthan expected. The excess current is due to X valley transport in the barrier. We willpresent experimental results showing that the use of a superlattice barrier and dopingspikes in the GaAs depletion regions on either side of the barrier can reduce the excesscurrent and improve the control of the capacitance vs. voltage characteristic.The experimental results consist of data taken from two types of device structures.The first test structure was used to study the performance of AlAs/GaAs superlatticebarriers. The wafer was fabricated into 90 micron diameter mesa diodes and the resultingcurrent vs. voltage characteristics were measured. A 10 period superlattice structurewith a total thickness of approximately 400 A worked well as an electron barrier. Thestructure had a current density of about one A/cm' at one volt at room temperature. Thecapacitance variation of these structures was small because of the design of the GaAscladding layers. The second test structure was used to study cladding layer designs.These wafers were InGaAs and InAlAs layers lattice matched to an InP substrate. Thelayers have n + doping spikes near the barrier to increase the zero bias capacitance andcontrol the shape of the capacitance vs. voltage characteristic. These structures have acapacitance ratio of 5:1 and an abrupt change from maximum to minimum capacitance.The measurements were made at 80 K. Based on the information obtained from these twostructures, we have designed a structure that combines the low current density barrierwith the improved cladding layers. The capacitance and current-voltage characteristicsfrom this structure are presented.*This work was supported by the Center for Space Terahertz Technology under NASA Contract No.NAGW-1334 and by the URI-ARO Program Contract No. DAAL03-87-K-0007.

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